Deep Cryogenic Operation of Single-Level and Stacked Nanowire and Nanosheet SOI MOSFETs for Quantum Computing
The aggressive scaling of MOSFET dimensions triggered the search for alternative solutions for the
traditional planar transistors for future technological nodes. Also, the advent of Quantum Computing raised interest in the cryogenic operation of ultimate MOSFETs for interface circuits between Qubits and electronic systems. Three-dimensional MOSFETs operating with fully depleted (FD) silicon fabricated in Silicon-On-Insulator (SOI) substrates are among the technological solutions being widely investigated.
